> Marc, how about just using a >100 Mhz digital storage osc.?

What bandwidth do you think I would need?

In AoE I found a precision auto-nulling amplifier, which could be used
to boost the voltage drop across a shunt. However I suspect that the
difference of 100 CMOS gates charging silicon traces on a chip against 105
doing so in the second measurement run won't be visible on a 256 dot
Y axis? It's a non-linear process, so auto-null can only account for
the leakage current of the chip under test.

I'd really prefer to integrate the consumption with a linear circuit
and precision-A/D it afterwards.  I have done mostly digital stuff
before so I'm a bit lost..