Harrison Cooper wrote:
> Now...for the bottom line, are you trying to cut down on power consumption?
> By adding an external device to swap clocks, and dual clocks (or divider for
> one master), may take just as much power as to run a chip at a higher clock
> all the time.

Not really, a PLL can be tuned to some crystal harmonic, so a 1MHz
oscillator
can generate a higher clock (when necessary), if not, everything will
run
at low clock. All of this *if* a stability clock is requested. If not, a
simple RC controllable oscillator can do a nice job.
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Wagner Lipnharski - UST Research Inc. - Orlando, Florida
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