At 16:03 03/08/99 -0600, John Payson wrote:
>|master mode is firmware also (you have hardware start and stop condition
>|detection for multi master mode).
>
>Out of curiosity, what fraction of I2C systems use...
>
> ... multiple masters in a single system ?
>
> ... clock-stretching ?
>
>or [for that matter]
>
> ... anything other than a single EEPROM or other memory device?

i just started to think i2c is really good because it has these features.
like in a system with many 100s of rarely changing inputs: each set of
inputs is handled by a controller who acts as an i2c master and sends its
message out when it detects a change in its inputs, and the "master
controller" acts as an i2c slave. makes for a pretty flexible and easily
expandable system, and it seems to be especially suited for pics (except
for the fact that only the bigger ones have a hardware slave).

because of clock stretching i don't have to think about speed issues
between the different participating controllers.

for just eeprom it's probably not optimal, but i think it's a pretty well
designed protocol if you use it for more than one peripheral. it's a system
bus, not a memory-access bus.

which also means, that if you run out of memory in your chip (say you
already have the biggest available in there), you can put a second memory
chip on the same bus with minor changes in hardware and firmware. if you
have only one dedicated memory access pin, you're probably out of luck
here. maybe if the devices would also be addressable... would the vast
range of clock speeds be a problem? if you use the pic's clock, the memory
device has to be able to handle a 20MHz clock or more.

ge