|master mode is firmware also (you have hardware start and stop condition
|detection for multi master mode).

Out of curiosity, what fraction of I2C systems use...

 ... multiple masters in a single system ?

 ... clock-stretching ?

or [for that matter]

 ... anything other than a single EEPROM or other memory device?


It would seem that--although I2C is popular because it exists and only
uses two port pins--the protocol really is overkill in some ways for
the most common application (memory interfacing) and it not designed
optimally for that purpose.  I wonder what it would take for Microchip
to introduce a line of EEPROMs which used a different interface that
would be:

[1] Faster, even on PICs without hardware support.

[2] Less expensive in PIC resources, using only one I/O pin on most
    PICs (using the PIC's clock pin as the clock).

[3] Super fast on PICs which provided hardware support [e.g. sequen-
    tial memory reads in three CPU cycles].

[4] Royalty-free, since it wouldn't be I2C...

Not that I2C is terrible or anything, but for a common subset of
applications it would be possible to do MUCH BETTER...