Hi.

I have a question about the 16F84 power consumption. What I need in my project
is to remember SRAM contents over short power failures. Storing the information
to EEPROM is not possible, because it is already full with other data.

To accomplish that I did decouple the 5V input with a series diode, and added
a capacitor on the PIC side. The (failure prone) 5V input is sensed with RB0/INT
.
A falling edge triggers the int, and the PIC 16F84 will go to sleep. This is
to make the capacitor charge last as long as possible.

The capacitor that I chose for size and cost reasons allows data retention of ab
out
30 seconds, which is plenty enough for the problem. However, the voltage falls
below the minimum allowed for the PIC to function properly (brown-out). There is
a window, about 8 seconds after power failure to about 15 seconds, in which the
16F84 will not restart properly. Before and after it works just fine.

I wonder what's the best way to avoid that. "Best" in my case is "minimum compon
ents".
Either I can connect MCLR to 5V input, which puts the 16F84 into RESET during
power failure. I can't find any power consumption figure in the data sheet for
that situation. But I guess, since the oscillator is supposed to start during
RESET, it will consume as much as during normal operation. Is that correct? Do
you have any information about this?

The other solution is to build a 5V rise detector that issues a reset pulse to
the 16F84. It must be very short in duration, though. The device is expected
to respond quickly. Can anyone of you suggest a VCC rise reset generator that
is available in SOT23 and does _not_ enlengthen the /RESET pulse into the ms
range (like the DS1233 for example does)? Possibly only as short as VCC takes
to rise above 4.5V? Or is a discrete circuit more appropriate to the problem,
as no reset is required on 5V =fall=, only on =rise=?