what I (and the prof) was/were thinking of, though, would be a device
    in which the main processor could access the row buffers 'at will'.
    In an application which has to move around large amounts of data(*)
    the ability to get fast access to everything in multiple rows could
    reap big payoffs.

Um, All of the assorted "burst mode" capabilities of DRAMs are essentially
methods of accessing the row buffer without having to touch the actual RAM
array again, right?  FPM and EDO for sure?

BillW