|  Further to other replies, there are a least *three* variables to
|consider; Vcc, Temperature, and *aging* (of both CPU and regulator, so
|they interact).  Only one of these is *readily* adjustable by the
|programmer, so a large variation in this is used in the understanding
|that it will account for the other two.

Right, but if successful verification of a part at VDDmin (as
opposed to something lower) is sufficient to assure operation at
VDDmin under all temperature/aging variations, and if verification
at VDDmax (as opposed to something higher) is sufficient to assure
operation at VDDmax under all temperature/aging variations, is
there any reason to expect that verification at VDDnom will not
ensure correct operation at VDDnom?