At 11:02 01/10/99 +0100, Morgan Olsson wrote:
>Sounds like the chip got into latch-up mode.
>
>This is caused by too much current on a pin (in this case ESD-spike),
>making part of the chip trigger like an SCR.
>
>It is probable that the chip in some cases should have survived the
>ESD-spike itself, if we just eliminated the high current.
>
>This might be done by putting a series resistor to the supply (The supply
>current is very low) and a zener and a small cap (10nF) on the chip side to
>stabilize and limit.

i don't understand the zener (if the supply itself is good). in a latch-up
situation, the voltage after the current limiting resistor is likely to
drop anyway, isn't it?

ge