>At 02:33 PM 1/8/99 -0700, Gabriel Gonzalez wrote:
>>Unfortunately taking the humans out is out of the question, the
application
>>requires it. They are not touching the circuits directly, but wires
>>connected directly to the circuit pins.
>>I've seen similar (comercial) devices doing exactly the same thing, but
>>using different methods and circuitry, but the interface is exactly the
>>same, humans get in contact with the circuits thru wires; and I don't know
>>their failure rate, but I assume they face a simmilar problem.
>
>
>Just because someone else did it, dosen't make it right.
>In the systems I've worked on, we used plastic keys, silicon membranes, a
>conductive "bleedoff" pad, and ground ring guarding, all to avoid the
>static carried by users. We didn't have static related failures.
>
>"They are not touching the circuits directly, but wires connected directly
>to the circuit pins"
>
>I assume by "circuit" here you mean the chip.. You should never have any
>cmos gate in a circuit where it can be "touched" by the user. There are
>ways to add additional protection, but I don't think you can ever add
enough.
>
>Is this a product in production, a prototype, or a hobby project?
>
>It's not clear to me yet what you are doing, and why you took this
>dangerous approach. What was the problem you were trying to solve by doing
>this? Why can't you use a switch, (which will give you a lot of protection
>if you use the right one) instead of this approach? I wouldn't put cost as
>an issue here, as the approach you're taking is going to result in 100%
>failed units.

I didn't want to waste too much bandwith on an OT issue, that's why I did
not go into much detail. But I'll try to explain briefly...

My application is a Harness Continuity Tester, and I use the CD4051B
mux/demux for the test points. Most of the harnesses tested have connectors,
but sometimes they have bare terminals, or it is assembled on the test
board, so people are constantly touching the terminals, and these are
directly connected to test pins which are connected to the test points,
which are CD4051s pins. So basically that's what I am doing... Now some
backup to support why I did this...

I worked for harness manufacturing companies for several years, and that's
how I got in touch with commercial test equipment. I worked as a Test
Engineer, so I had a chance to try an test equipment from several
manufacturers. And I decided that I could build a better tester than what
was available, cheaper and with the necessary functions. So I built one
using TTL logic for the test interface. It was not as easy as I thought, but
finally it worked ok. But the TTl interface was flaky. So I redesigned the
interface using the CD4051 IC, and it worked perfectly, or so I thought. We
have built and sold about 800 of these testers. But every once in a while
they are returned to us because of blown ICs.
Then I decided to find out how the comercial equipment worked and got a hold
of several testers from two of the better brands on this type of equipment,
Cablescan and Dynalab. To my BIG SURPRISE! they both use the exact same IC
for the test points. Both used a slightly different approach but basically
they did the same thing as I do, and they both have the test points
connected directly to the CD4051 pins.
Then, more recently I got the chance to check yet another two brands of
testers, and both also used the same CMOS IC in almost the same fashion as
every one else.
So I assume that I was not at all lost with I was doing.
But all this does not solve my problem.
Due to the density of the tester circuit adding a bunch of resistors (even
in DIL packages) is a relatively heavy impact on the size of the board, but
if I can't find any other solutions that's what I'm gonna end up doing...
If using a resistor is the only feasable option I have, what I want to know
is how small a value can I use???


Thanks again,

Gabriel
TGO Electronics