Greg Cormier wrote:

> Ahhh, alright. So any addresses passed will be
> S#######b

  The reference document, at least for the PIC16C84, is DS30081E.PDF
It's a useless number and I automatically renamed it to something
meaningful on my system so I can find it when I need to (like now).

  The Register File map is Figure 4-2 on page 12 and the explanation of
how the banking is performed is in the paragraphs adjacent.

  A diagram of mapping of the register address from the opcode and
alternately via the FSR is given in Figure 4-7 on page 18.  It is a
trifle "generic" and mentions banks 2 and 3 which are not applicable
to the 16C84/ 16F84 but you might as well grasp the process in case you
ever use a "big" PIC.

> but at the moment, I only need to switch banks for setting up the
> IO

  Well, for goodness' sake, use the TRIS instruction - *that's what it's
there for*.  It's missing from the Instruction Set Summary in table 9-2,
but is in the Instruction Descriptions which follow.

  Ignore the waffle about "may not be supported on future devices", this
is just some mental mast... err, theoretical imagining of some design
engineer over there.  They had been waffling like this for years before
they brought out *new* parts; the 12C508/9 which were "retro" and didn't
even have the alternate access to TRIS via bank-switching available.

> Is there a document describing, or can you tell me,  the bits in the
> special registers, like status, and option? I went through the 16C84
> PDF but find nada, same with MPLAB and MPASM files.

  Sure is; see table 4.1, "Register File Summary" and the detailed
specifications following.  Table 8-6 tells you what values are in those
registers on reset.

> And I was going through some more code today, and found some interupt
> stuff. What I understand (for the 16C84) is that the chip powers on
> (or resets?) at 0x00, and those first 4 bytes usually have a GOTO in
> them,

  More or less.  You only need one word (*not* a byte actually) for a
GOTO, but the next three should contain $3FF (ADDLW -1) which can be
patched with another GOTO and the first one burnt to NOP ($000) if you
need later to patch in some extra initialisation code without re-burning
the whole device (no matter on a 16C84, but big deal on an OTP).

> and then at 0x04, that's the interupt timer?

  Interrupt vector.  This point is called for anything that generates an
interrupt, including the timer if you so choose.  It is up to you to
write the code to look for the actual interrupt source and deal with it.

  Notes: 1} if you deal with one interrupt, including clearing its
particular interrupt flag, and another (different) happens while you are
doing this, at the RETFIE you will return to the main routine, execute
one instruction only, and re-interrupt to service the second.  It isn't
strictly necessary therefore to make the Interrupt Service Routine loop,
though it *might* be practical to do so.

 2} RETFIE (as its name suggests) sets the GIE flag just as an interrupt
clears it, so you don't need (and generally don't want) to set that in
your ISR.  In fact, a novel if generally unnecessary way to enable
interrupts in the first place is to CALL a location containing a RETFIE.
Further, it may be appropriate to call the tail of the ISR for the code
to set up for and enable interrupts in the first place.
--
  Cheers,
        Paul B.