Suppose you have a PWM available (hardware or software). You can generate a varing duty cycle PWM wave form that cycles from something like 1% to 50%+ and then back down. You filter this waveform with a simple RC filter (2 parts) and you get a sine wave. You can level shift it if you need to. You can use a constant ROM look up table, different tables can give you different output voltage references. Run the PWM on an interrupt. Change the interrupt time to change the frequency. -----Original Message----- From: Mike Keitz [mailto:mkeitz@JUNO.COM] Sent: Saturday, December 12, 1998 3:47 PM To: PICLIST@MITVMA.MIT.EDU Subject: Re: Sinewave generation On Sat, 12 Dec 1998 17:35:43 +0200 Quentin writes: >Read AN 655, It will explain it to you. Best is to use a R-2R ladder >with >4 to 8 pins, depending on your aplication. Basically what you do is to >create a lookup table with your sine steps (0 to 255 or 0 to 16) in >it. >Then your programs puts these values in sequence on your output pins. There are lots of ways to make sine waves, especially at 100 Hz. A resistor DAC works OK. It is better to use a nonlinear resistor network that is optimized for sine waves. That trick dates back to very early days of digital logic. Five resistors in the ratio 1.5, 3.9, 4.7, 6.8, and 20 makes a nice 16-sample approximate sine wave. They are also standard value resistors. One end of each rresistor goes to a PIC pin which is always an output, the other end of all 5 resistors goes to a common node which is the sine output. The digital sequence applied tot he pins is pretty much what a shift register would make (early implementations did of course use a shift register, but needed a few more resistors.) You end up with a "staircase" looking wave that still needs a little analog filtering before you really can call it a sine. Often just a single capacitor to ground will be sufficient. In the most recent generation of my CTCSS encoders (that is what the guy who wants a 100 Hz sine wave needs it for, right?), I've used "magic sine" techniques described by Don Lancaster (www.tinaja.com). Only one PIC pin is required, it is driven either on or tri-state for each sample period. During half of the sine wave, the pin drives high, during the other half it drives low. The sampling rate is quite high, hundreds of samples per output cycle. The sequence of whether to output a pulse for each sample is stored in a table. The table can represent as little as 1/4 of the full wave's samples if you re-use it properly for each quadrant. The data in the table is of course one bit for each sample. The density of "1" bits increases and decreases in a sinusoidal manner. Lancaster's site has many suitable sequences as well as methods to use to derive new ones. An R-C integrator will clean up the pulses to a decent sine wave. Using two integrators in series makes a really nice sine wave. In order to integrate properly, the integrator neds to be set up so the output amplitude is much less than VDD (this causes the voltage across the resistor to be relativley constant during each pulse). An amplifier may be needed if a level of more than 0.5Vpp or so is required. But, the same sine amplitude can be maintained over a wide range of frequencies using the same filter if the output pulses are a constant width (i.e. reduce the frequnecy by increasing a "dead" off-time after each pulse. Then the energy coupled to the integrator per cycle is the same regardless of the frequency). The downside of the "magic sine" is that with 210 or more samples per cycle it takes a lot more PIC time than a DAC based approach. I haven't tried anything with PWM. I think software PWM would need even more CPU than magic sine, but on a PIC with PWM hardware it could work well. Someday I'll put all this on a web page. For right now I'll just tease you. ___________________________________________________________________ You don't need to buy Internet access to use free Internet e-mail. Get completely free e-mail from Juno at http://www.juno.com/getjuno.html or call Juno at (800) 654-JUNO [654-5866]