- that using TMR0 as the time base works well, (external timing result
s
        show 99.992%, which is probably measurement noise)

          - that reloading TMR0 and insisting on using it as a time base require
s
        that no other interrupts be enabled, for otherwise the reload can be
        delayed,

I would suggest that using "addwf" on the TMR0 register is much
better than reloading it with a constant.  Simply add (259-desired
timer period) to RTCC any time in your ISR and, provided that you
don't dally too long before the add it will work consistently pro-
vided only that the add completes before the next timer tick inter-
rupt is supposed to happen.

Unfortunately this does not work when using the RTCC with a pre-
scalar, meaning it's limitted to triggering interrupts at intervals
which are either <256 cycles or a power of two in length.  While
there are ways of preventing and/or correcting for timing errors
introduced by RTCC writes' clearing of the prescalar, I don't know
of any particularly good ones.