I'll give this a shot, but please understand that the reason these
things are hard to understand is that they are even harder to
explain.

> I'm still a bit confused, though, about the exact function of the two
> load capacitors.

If we go back to the dream time, an ideal parallel resonant circuit
is an inductor in parallel with a capacitor. If we change either of
those, the resonant frequency changes. When we look at the equivalent
circuit of a crystal there is an R, L and C in series and then
another C (Cp) across all of them. Both the R and the C are very
small and the L is very big so it is reasonable to consider just that
portion of the circuit as an L. In order to use that L we need to
attach some contacts by plating metal onto the quartz. Since quartz
is an insulator, this makes the capacitor Cp.

As Dave points out, if we just used the L of the crystal and that Cp
value to form our resonant circuit the frequency would be very
dependant on the strays around the board. When we put capacitors on
the outside of the crystal, we are putting them in parallel with Cp
so that they are the dominant capacitive component in the circuit.

Now it gets tricky. We want a circuit that will provide us with
feedback that is 180 degrees out of phase with our amplifier output.
The point that this occurs is in the middle of Cp with respect to the
other end of Cp that is connected to the amplifier input.

That doesn't say it very well at all. I would suggest that you have a
look at a discrete Colpitts oscillator circuit. With all the
components out in the open, it's a bit easier to get your mind around
how the circuit is operating.

If we call the two added capacitors C1 & C2, then from the crystal's
perspective C1 and C2 are in series and connected in parallel with
Cp. This combination is in parallel with the predominant L of the
crystal to form the resonant circuit.

>From the amplifiers perspective, the signal to amplify is the voltage
between one end of the crystal (amp input) and a point half way
between the two crystal terminals (connected to gnd by the two
capacitors).

>  It would seem that the cap on the PIC's output is
> there to load down the PIC enough to prevent it swinging rail-to-rail.
> Is that what it does?

No. See above. The reason it doesn't swing rail to rail is that the
gain of the amp is highest and is linear about the centre point. If
the output starts heading for the rail, the gain is lower so it is a
form of negative feedback that keeps the amp where we want it. If it
did reach the rail it would clip the sine wave which (according to Mr
Fourier) would introduce harmonic components. That would make life
very difficult.

> Would adding a small L between the PIC and that
> cap help reduce EMI emissions by cutting peak current spikes, or is an
> R better?  If an L is good should it be selected so that LC ~= the des-
> ired oscillator rate, or is it somewhat arbitrary?

If you are having EMI concerns the oscillator isn't the thing to play
with. It is a nice (almost pure) sinewave within the smallest loop
area you can make and most importantly, is closed loop so it only
generates as much energy as it consumes. From an EMI viewpoint, the
oscillator itself is a low radiator.
However, all circuit operations within the chip are done at the
crystal rate so that is the frequency that shows up on the spectrum
analyser and guess what gets the blame.

> Also, another thing I was wondering: what (if anything) prevents both
> sides of the crystal from simply sitting at about half-rail with no
> oscillation?

Designers prayers.
In an ideal world it would sit at mid-rail as that is the purpose of
the feedback resistor. When it is at that point the amplifier has has
its maximum gain and we rely on reality helping out. In the real
world you have a power supply that comes up in leaps and bounds and
thermal and other noise sources all being applied to the amplifier.
These are all amplified to the max and starts to excite the crystal.

> Also, a common trick people have used (esp. with handwired PIC circuits)
> is to tie the crystal load caps to VDD instead of ground.  What are the
> startup and EMI implications of this, if any?

When we put all those ceramic caps across the supply (decoupling
each logic chip) we are trying to make the two rails appear to be
connected for high frequency signals. As far as the oscillator
circuit is concerned they are connected together. It's usually done
for layout reasons.

> Finally, I was wondering what are the effective limiations on RC-based
> oscillators (other than the PIC's built-in one)?

> In preferred implementations, comparators are used in place of the
> Shmidt trigger to ensure that the treshholds are consistent.

You've answered your own question. Relaxation oscillators are
threshold sensitive (by comparison). Not just the actual
comparing device but by the nature of the exponential charge curve.
If you have a threshold that is say, several time constants, the
voltage on the cap is almost horizontal as it approaches the
switching point. Any noise will trip it.
If you set a low threshold, you are sensitive to the discharging of
the cap and this can be quite variable with temperature, devices,
etc.

On the other hand they are cheap, simple and reliable and aren't used
often enough (imho). You either need accurate timing (serial comms,
running a clock) or you don't. A user doesn't notice if you take
100ms or 120ms to update a display and the display doesn't care as
long as you have your delays calculated for worst case.

Steve.
======================================================
Steve Baldwin                Electronic Product Design
TLA Microsystems Ltd         Microcontroller Specialists
PO Box 15-680, New Lynn      http://www.tla.co.nz
Auckland, New Zealand        ph  +64 9 820-2221
email: steveb@tla.co.nz      fax +64 9 820-1929
======================================================