>     On every other cycle, output bit -1
>     On every 4th   cycle, output bit -2
>     On every 8th   cycle, output bit -3
>     On every 16th  cycle, output bit -4

|I was using this method.  I had even posted the code a week or two ago a
|2 cycle 4 bit resolution pwm using this method for Tjaart's challenge
|for a battery charger controller.  Here is the corrected version of the
|code.


Your suggested method is a little different from mine; same
general idea, but the output waveform is different.  Using a
4-bit PWM'er, mine sets the output based upon bits...

  3 2 3 1 3 2 3 0 3 2 3 1 3 2 3 -

whereas yours is based upon bits...

  0 1 1 2 2 2 2 3 3 3 3 3 3 3 3 -

A value of "11" [1011] on my scheme would be output as

  1 0 1 1 1 0 1 1 1 0 1 1 1 0 1 0

whereas on yours it would be output as

  1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 0

The scheme I described will provide a finer dither pattern than
yours, but will be more succeptible to changes in pulse lengths
(e.g. if the pulses go through optos before filtering).  Both
approaches have a further limitation in that there isn't any
"good" time to change the output value without causing some
disturbance (e.g. if the output value goes from 7 to 8, there
may be an interval in which 15 consecutive zeroes or ones are
output.  On the scheme I described the worst case is probably
going from "1" to "2"--a smaller absolute error but equally
large in relative terms.)