Frans Gunawan wrote:

> 1. load data 1's command (don't know load data for Program/data, no
> explanation)
> 2. bulk erase command
> 3. begin prog
> 4. wait 10ms

> I try: no 2,1,3,4 and bulk, data 1's, begin prog,wait (David Tait's
> version).  Both are work! Still don't know the right answer.

  What's the problem?  Step one as stated loads a register with the data
to apply to the memory cells.  Step two sets a gate that accesses all
memory cells simultaneously rather than using the normal address gating
(i.e., an OR input to the AND array in the address multiplexers).  Step
three enables the write sequence to apply programming voltage.

  Why should the order of the first two steps matter?

> Why Microchip don't want to fix it?

  Fix what?  I could be wrong, I haven't tried any of this out, but as
it is described, I don't see any inconsistency.
--
  Cheers,
        Paul B.