> Van: Nuno Pedrosa <nuno.pedrosa@OEN.SIEMENS.DE>
> Aan: PICLIST@MITVMA.MIT.EDU
> Onderwerp: Add and Instruction Cycles
> Datum: donderdag 23 juli 1998 12:56
>
> Hi!

[Cut]

> Now, my question:
> While trying to count the bits on a byte, I stumbled into this:
>   GOTO is a 2 cycle instruction.
>   ADDWF is 1 cycle
> I think the difference is on the instruction pipeline behaviour, right?
>
> However, if you do ADDWF PC, what happens to the pipeline? Does ADDWF
> take 2 cycles in this situation? If not, why not?

The ADDWF allways takes one cycle.  The problem is that a write to PCL
clears the Pipe-line.  This results executing a NOP as the next
instruction, because it has to load it's Pipe again.  This effect is equal
to what the GOTO experiences (it too changes the PCL :-).

In the above situation the instruction after the ADDWF will be executed 2
cycles after the ADDWF, and not 1 as expected.  But as explained above,
this has nothing to do with the ADDWF instruction, but everything with
writing to PCL (Yes, a GOTO to the next adress still takes 2 cycles).

Greetz,
  Rudy Wieser