Thanks for the feedback Ake, the crc is a good idea and will be needed in one form or another, We could make each "byte" 9 or 10 bits with 8 being data and 1 or 2 being parity or similar. For the signaling of start of transmission I was thinking of a "reset pulse" being a long low like in the 1-wire protocol. Different speeds would probably be handled by different networks (RS-485 could be the backbone due to its high speed) with 1 wire running at 17K you could add dallas devices direct to the network and utilize the 3 pin switches etc just by note using the "family code" of the dallas devices as a node so all the other devices will ignore the transmission. I was going to handle interupts by a priorty system where a transmission to device 255 is read by all nodes and read say register 127. All the devices with an interupt will answer but the first device with a 1 instead of a 0 will win and all the other devices will stop talking. This way the master gets the address of the 1st device. Units with sensitive tasks could be given a higher node address and hence priorty. If the master reads register 126 this could be a lower priorty interupt etc. This way you could check for different levels of urgency. The initial address could be given by sending out the unique 32 or so bit serial number as a broadcast (255) and an address tacked on the end which the node remembers, you would only have to do this the first time you turned on the node and would save on dip switches and programmers. Comments please. regards Lee McLaren -----Original Message----- From: Ake Hedman To: PICLIST@MITVMA.MIT.EDU Date: Tuesday, 14 July 1998 10:02 Subject: Re: PIC net I like this. Just need some clarifications. You dont't specify the size for the register content. I assume 8-bits. ( I REALLY LIKE THE REGISTER WAY TO DESCRIBE A NODE. A node have a couple of registers and an address. Thats it!) So a read is 16 bit word clocked out containing address and read bit set and the selected register one wants to read. The master then runs the clock for as many registers it needs to read from the initial one. The slave just puts out register contents( or maby a one for a non existing register ) until the clock stops. and a write 16 bit word clocked out containing address and read bit cleared ( WRITE ) and the selected register one wants to write. The master then runs the clock for as many registers it needs to write from the initial one. The slave just accept register contents until the clock stops. There is as I see it, some need for a sequency ( may call it ALERT ) that tells slaves that the master is through reading or sending data. This can be specified as as something that happens on the wire ( clock inactive for x ms etc ) or a packet of some kind on the buss. I would prefere a packet oriented approach. Thus ! Header ! address ! R/W ! Register ! Data ! CRC ! Very simple and clean. This would also be easy to use in the routing scenaro you discuss which I buy fully. I just would not have the lay the burden of knowing the routes on the master but instead leave that to the routing device. The header could of course be different for read and write and make the R/W bit obsolete making the register selector a full byte. With a header/packet approach it would also be easy to specify how many registers to read/write. Different headers would be possible to implement, ALARM ( sent by a unit who needs attention), STATUS ( sent by a data logger for example ) etc. Also I would like some sort of initial mechanism that finds the devices on the buss and also find the maximim clocking rate for theese devices. If we go for a Cat-5 bus system we could use ( assuming RS-485 ) Pair 1 - Differential data out ( From master to slaves ). Pair 2 - Differential data in ( From slaves to master ). Pair 3 - Differential clock. ( from master ). Pair 4 - Some AC voltage (32/33V ) Some relays etc needs 24DC so.... It would also been very nice if the clock could have different frequency for different devices the master is talking to. Knowing there capapility from some sort of initial "get to know each other" sequency and then use that clock rate when talking with that device. This indicates some sort of device selection. But the advantage is that one really can make full use of the RS-485 spec. and CAT-5 spec. The device selection phase must also be on the lowest common clock frequency. OK. just some thoughts.... /Ake -----Original Message----- From: pic microcontroller discussion list [mailto:PICLIST@MITVMA.MIT.EDU]On Behalf Of Lee McLaren Sent: Monday, July 13, 1998 12:10 PM To: PICLIST@MITVMA.MIT.EDU Subject: Re: PIC net Ok I am happy to keep in on the list, it just may generate a lot of traffic in the long run... Anyway I expect we should submit some rfc (request for comments) on the subject so I will put forward my ideas for comment: 8 bit address (255 devices per segment) 1 bit (R/W) 7 bits (register select) ============== 16 bits A master controller talks to nodes (switches, inputs etc) directly on the segment (this may be 1 wire or main modem etc) and if a change of media is required then a router is added as a node and the routers node address is added to the front of the address on the next network, the router strips of the first byte and sends it out on the network behind it so we are back to 16 bits. This can go many routers deep so the number of devices is unlimited. Anyway after the address and register are sent the master in the case of a read will keep sending clock pulses and the slave (node) will keep sending the contents of its reqisters starting with the one named in the original call. This will save a lot of overhead in the case of sequential reads and writes. I have done a lot of work regarding broadcasts and interupts as well as initial config of address's but that can come latter if anyone is intrested. Please comment Lee McLaren