At 17:50 1998-07-13 -0400, you wrote:
>I really do think that you are correct. They don't simply divide the
>clock by a factor and then use it, they generate several different clock
>signals of different phase shifts (like quadrature, in the case of the
>PIC) to synchronize various processes inside the chip. If you lok at the
>pic databook, you will see that it lists what process the pic does on
>each clock pulse for each instruction.
>
>Sean

I want to add my thought about AVR timing:

I believe the AVR do about the same; but reverse: for each clock cycle it
makes intermediate states somehow internally.  Like: first, do something on
rising edge, another thing on falling edge.

If that is not enough, generate intermediate steps, and viola: we got four
steps per external clock cycle (macine cycle), like PIC got four clocks per
macine cycle!  

This intermediate step generation  might be done using simple
RC-schmidttrigger-timers, driven by the clock; as they don«t have to be
centered between the clock pulse edges, the time can be constant, but if it
is made that the times increase with higher clock cycle (pretty simple anog
design) it can work to lower supply voltage at lower clock inputs.

comments, please

/Morgan
/  Morgan Olsson, MORGANS REGLERTEKNIK, SE-277 35 KIVIK, Sweden \
\  mrt@iname.com, ph: +46 (0)414 70741; fax +46 (0)414 70331    /