In message <1.5.4.32.19980709123128.0066ec5c@mail.teleport.com>, Tom Handley writes > Pavel, my goal is to provide the core logic and supporting hardware >design for the logic analyzer. Then I want to release it to the public in >hopes that the software becomes a group effort. While I want this to be a >PIC project I'm also designing it to be compatible with a PC host using a >parallel port. I am also looking at using a 16C76 or 16C77. The host >interface requires 15 I/Os in the 4-Bit transfer mode and 19 in the 8-Bit >mode. One issue is the time it takes to transfer up to 128KBytes of data >to a PC for each sample. > > If you are using the ispLSI1032, then you must have the full version of >the Lattice fitter and Synario. I only have the starter kit. It would cost >around $2500+ to upgrade. It's hard to justify the expense for a >vendor-specific product line even though Lattice is local here in Portland >and I've been using their products for around three years. I could easily >put this in a 1032... [deleted] The current Lattice starter software available for downloading from their web site will program all their 1000 and 2000 series devices, including the 1032 - up to 8000 gates. Leon -- Leon Heller: leon@lfheller.demon.co.uk http://www.lfheller.demon.co.uk Amateur Radio Callsign G1HSM Tel: +44 (0) 118 947 1424 See http://www.lfheller.demon.co.uk/dds.htm for details of a simple AD9850 DDS system. See " "/diy_dsp.htm for a simple DIY DSP ADSP-2104 system.