At 05:31 9.7.1998 -0700, you wrote:
>   As far as testing, I only have the functional waveform test in Synario.
>The Timing Analyzer is only included in the full version. I've ran
>functional tests on the ABEL modules and the top-level schematics as well as
>static tests on the chips. That's a long ways from the `real-world' though.
>I'll probably release the preliminary design before I actually build my own
>prototype.

I just checked it on www.latticesemi.com. Timing Analyser is included in
Synario Starter, at least in the version which is downloadable now from the
Web. I will check it once more at home, where I have the latest downloaded
version installed.

Best regards

PavelK


Here is a quotation from the Web page:

===========================================================================

The ISP(tm) Synario Starter software is now available for download. This
software includes all the tools that you need for
designing with Lattice ispLSI(r) 1000, 1000E, 2000, 2000V, and GAL(r)
device families. The ISP Synario Starter runs
under Windows NT(r) and Windows 95(r), and includes:

    Lattice ispDS+(tm) Starter (Part 1)
        ispDS+ HDL Synthesis-Optimized Logic Fitter
        Explore Tool
        Pin Assignment Editor
        ispTA(tm) Timing Analyzer
        ispDOWNLOAD(tm) and ispATE(tm) Utilities
        VITAL and Non-VITAL VHDL Simulation Libraries
        OVI-Compliant Verilog Simulation Library

    ISP Synario Software Starter (Part 2)
        ISP Synario Project Navigator GUI
        ISP Synario ABEL-HDL Entry and Compiler
        ISP Synario Functional Simulator
        ISP Synario Schematic Capture
        GAL Compiler

Download the ISP Synario Starter today, and join the ISP revolution!

========================================================================

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* Pavel Korensky                                                         *
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