Hi,

>      A few bods have mentioned that they are annoyed by the way in which a
>      large number of micros divide down the external clock, resonator or
>      crystal usually, and run instructions at that speed ....
>
>      What are the reasons for people finding this so distasteful? I
>      understand that clock division and PLL circuits can be noisey, but I
>      get the feeling that this is not the only reason.
>
I think one disadvantage of a clock divisor is that it limits the
maximum frequency at which a part can operate.  Take the good old 8051
for instance.  It has a /12 and therefore to have it run at an
instruction clock of 5MHz, you have to clock it at 60MHz!  Even if it
could be clocked at 60MHz, it would be a non-enjoyable execise to build a
good 60MHz oscillator and it would consume a large amount of power.

A further implication is EMC.  With EMC laws becoming stricter, it
becomes more and more important to limit the highest frequency in your
design.  If you need a 24MHz oscillator to get the same performance from
a 8051 than you would get from a 2MHz AVR (maybe even 1MHz), then the AVR
would be a far better choice on EMC considerations alone.

Just my 24/2 cents worth...
Niki