As I promised, here's the 256 level all software PWM routine.

http://www.interstice.com/~sdattalo/technical/software/pic/pwm256.txt

It's only been tested with 'the' simulator and has not been burned into a
chip. The current version has been simulated with both an F84 and a 12C509
as the host processor. Also, the current version does nothing more than
repeatedly generate the same pulse. Stay tuned for a DTMF dialer...

Salient Features:
  - 256 PWM levels
  - Single instruction cycle resolution
  - The Pulse width can be any where from 0 to 255 cycles (inclusive)
  - Over half of the cycles are available for other things
  - 6 RAM addresses and about 256 ROM locations
  - No interrupts are needed
  - TMR0 is not used


Scott