Keith Howell wrote: > Hi chaps & chap-ettes, > > Has anyone else noticed this aspect of the PIC SSP in I2C mode: > > 1: When reading data from the SSP, it makes the bus wait > ((by holding SCL low) until the CPU loads the data into SSPBUF > and then sets CKP. This is desirable behaviour. > > 2: When writing data to the SSP, there is no equivalent wait-state > insertion. This is not desirable. I don't think this is in the I2C spec. (I could be wrong, so please be gentle when flaming ;) You can find out for sure at these links : http://www.wasp.co.za/~tjaart/electronicsearch.html I think the best way to do proper I2C slaving on a PIC, is to use a Scenix. I've also been down the I2C-slave-on-a-PIC road. Pretty rocky out there. -- Friendly Regards Tjaart van der Walt mailto:tjaart@wasp.co.za |--------------------------------------------------| | WASP International | |R&D Engineer : GSM peripheral services development| |--------------------------------------------------| |SMS mailto: 0832123443@wasp.co.za (160 chars max)| | http://www.wasp.co.za/~tjaart/index.html | |Voice: +27-(0)11-622-8686 Fax: +27-(0)11-622-8973| | WGS-84 : 26¡10.52'S 28¡06.19'E | |--------------------------------------------------|