Hi,

Last week I went to an Atmel AVR seminar for the first time.  It was
interesting to see their angle of approach : They are really serious
about competing head-on with the PIC.  All through the seminar, the
presenter was pointing out the PIC's inadequacies.  At one stage he had a
slide comparing a 16 bit subtraction on the PIC and the AVR.  I have
never seen such a long 16 bit subtraction routine on a PIC in my life!
It must have been at least 20 instructions!  The AVR routine was 2 or
three instructions.  To be fair, the AVR would still beat the PIC on a 16
bit subtract, even if they compared it to an optimized subtraction
routine, but not by such a large margin.  And of course he did not
mention the inefficient table read until he was asked about it.  Those are
the ways of marketing...

We did get an AVR develoment board - which is quite nice - and a 1200 to
start playing with.  They are also planning on adding loads of different
devices and peripheral options in the ?near? future.
What I do like about their core, anyway, is the true RISC architecture
(no more moving to W before doing a calculation), the support for >8 bit
arithmetic and the large number of test and branch instructions (no
more btfss - goto combinations).  One core limitation I see is the fixed
amount of registers (32).  On larger devices with RAM you would have to
start to do a lot of moving between the register file and the RAM.

If Atmel can compete in price (which is what matters, afterall), the AVR
might just give Microchip a run for their money!

(Don't worry, I have not been converted - I just keep my eyes open ;-)  )

Niki