On Wed, 13 May 1998, William Chops Westfield wrote:

> The DEC PDP-10 had separate assembler mnemonics for "macros" and "opcode
> definitions."  Given the extremely regular ("RISC" :-) instruction set,
> the main purpose was to allow you to reuse the parsing for the operands
> when you defined a new opcode, but it's a principle that may be worthwhile
> to resurrect...
>
> BillW

  My favorate assembler was for the Univac 1100 Series MASM.

    The facilities for defining new opcodes had powerfull macro
    facilities.  (Powerfull enough, in fact, that someone built
    an evaluator for lambda calculus expressions in macros).
    It was straight forward to add appropriate conditions so that
    you could inforce "This macro can't follow macros in the
    xxx class)" sorts of restrictions.

    The abilities to define new ops was powerfull enough that
    there were definations for other machines availiable that
    produced bytes in Univac's relocatable format that you
    could strip out and send to other machines.

    LeRoy Eide produced, for a local communcations project,
    macros to define tables that not only produced the
    appropriate code to deal with partial word fields, but
    also drew labeled pictures of the tables in the
    assembly listing.

After seeing such assembliers (over 15 years ago) I'm surprised
that the assemblers I see for PIC's and other microcontrolers
are as limited as the assembliers I programmed on 30 years ago.



Is this a marketing issue?  Would people not pay for an assembler
with real power?

Actually, it wouldn't be hard (if someone still had a Univac 1100
around) to write the macro's to cause it to emit PIC instructions)
with assembly time errors if one tried to use a multi-instruction
macro after a test instruction...

Actually... most people's PC's have more power that the Univac
1108 I first used MASM on...