>private. Heck, though we have never met I feel like I've known you for >around 3 years ;-) Same here. Now I find one of our customers in named Tom Handley. You don't work for a TV network in NYC, do you? > I've been working with Lattice Semiconductor's ispLSI1016 CPLDs for >around 2.5 years. The device comes in a 44-pin package including PLCC and >TQFP. It provides 32 I/O lines, 4 dedicated inputs, 3 clock lines, and >dedicated In-Circuit-Programming pins. The 80Mhz version sells for around $8 >in singles. The software is free. See Hamilton-Hallmark for current pricing. Sounds pretty close. The best AMD/Vantis can do so far is $14.00 for a cross from an Altera EPM7064. (Somebody has already done it in that based on my description - it uses 100% internal logic he said). All I need is 1 real-slow (read "KHz") speed. I'm going to visit Lattice, I guess. > As with any PLD/CPLD/FPGA design there are a lot of trade-offs to be >made. The main thing is a good understanding of the architecture and the >development tools. With your expertise, you should be able to get Er, uh, I only know how to make address decoders right now. I was reading through the Cypress stuff, and was pretty much blown away. A lot of studying to do. When I was getting out of college, PAL's were just becoming available commercially! >own host ISP download software. This version is restricted to their 44-pin >CPLD devices (1016/E and 2032) but it is very powerful. Other than the Guess I have to pay for software for the chip I need, then? Thanks for the info. Andy ================================================================== Andy Kunz - Statistical Research, Inc. - Westfield, New Jersey USA ==================================================================