You might also look at the Xilinx package called
Foundation.  Supports Verlilog (soon they say?) and VHDL, simulation and
uses the Synopsis engine for synthesis.  Myself, I have been burned on
Altera.  Did a design some 5 years ago, both in their schematic capture
and AHDL, and NONE of the old designs can be read in by the new tools.
Asked them about it, and basically said....yea we know...sorry....

                So needless to say, I am stickin with Xilinx (actually
doing all designs in verilog).

                Of course, this does not do any PCB layout stuff.