Hiya,

Marc has pretty much explained why I did this.  "TRISA", "TRISB" and
"OPTION_REG" are all in Bank 1 of the mid-range parts and to allow the
correct address to be loaded into the FSR correctly, bit 7 of the address is
set.  The "& 0x07F" explicitly clears this bit.

Now, the "best" way of doing this is to use "^ 0x080" which XORs the most
significant bit with 1.  If the bit is zero, it will be set, which will
catch an error in what you are trying to do.

You might want to look back at pages 31 and 32 and this is explained in more
detail.

myke

>Hi FScalini (FScalini), in <4dcce472.352e9d9c@aol.com> on Apr 10 you wrote:
>
>> Several times throughout your PIC book, I noticed  "& 0x07F".  For example,
>> pages 222 and 223:
>>    clrf TRISB & 0x07F
>>    ...
>>    ...
>>    movwf OPTION_REG & 0x07F
>>
>> If it is an address, what is the significance of it?  Thanks.
>
>OPTION_REG & 0x7f (or 0x07f) is an AND mask.  The result of this expression
>is OPTION_REG with highest bit clear.
>
>The PIC has registers in several banks.  You have to select a bank in the
>STATUS register.  When you access a register (such as TRISB or OPTION_REG)
>that is not located in bank 0 (the default bank), the assembler generates a
>warning - to remind you that you need to set the bank bits correctly in
>your code.  Otherwise an access to TRISB would end up in PORTB for example,
>because PORTB is at the same location in bank 0 as TRISB is in bank 1.
>
>Probably the author of the code snippets above did set the bank bits
>accordingly, and did want to suppress the warning associated with the
>access (because he has checked it already).  Therefore he cuts off the MSB,
>that indicates its an access to bank 1 to the assembler.
>
>When there are still warnings they show sections of the code that he FORGOT
>to treat this way, and that's how warnings should be like.
>
>

"If people don't know what you're doing, they don't know what you're doing
wrong." - Sir Humphrey Appleby K.C.B