On Fri, 13 Mar 1998 01:05:43 -0500 Gennady Palitsky
><gennadyp@MAINLINK.NET> writes:
>>I wonder if anybody tried to synchronize PIC to video signal.
>[...]
>> Nevertheless vertical line on a screen have jitters of
>>about one
>>cycle size (~280 nS). According to datasheet  (I am using 16C71)
>>interrupt
>>latency = 3-4 cycles depending on where interrupt occurred during an
>>instruction cycle time. It looks like this +/- 1 cycle gives jitters
>>observed.

>Yes indeed it does.  The problem is that the PIC can't resolve events
of
>smaller than one instruction clock (xtal/4), and that your crystal
(even
>if it's a very good one) is never exactly the same frequency as the
>incoming video.  14.318 MHz is a bad choice anyway, as it makes the PIC
>instruction rate 3.579545 MHz, or 227.5 PIC instructions per NTSC line.
>So the PIC will always be 1/2 cycle off of the video.
>
>Several people have used RC or LC oscillators in circuits that stop
them
>before each line.  The horizontal sync pulse from the video signal is
>used to restart the oscillator, always in consistent phase with the
>video.
>
>I've had good results with a continuously running LC VCO as the PIC
>oscillator, and phase locked it to the video.  You should be able to
find
> detailed post about that in the archive.

I once had to solve the same problem. I ended up creating a "software"
PLL with the pic.
I had a TTL oscilator generate the clock for the pic and then run the
clock into a NAND gate then to the pic.
Using a JK flip flop to control the gate I was able to have this circuit
"rob" a single clock cycle from the pic.
The principle was to sample the sync line just before the transition and
then send result to one pic pin connected to the
flip flop. When I sampled just before the transition, nothing happened
but if I sampled after the transition the sample level would
clock the flip-flop and make it "rob" one cycle. I was able to get 1/4
instruction cycle resolution that way and that was enough
to eliminate the apparent jitter.

This needed two extra chips though. I have since got a look on a similar
principle design that did not used any extra chip.
The PLL clock speed change was done, if I remember well, by putting a
Zener diode in parallel with one of the 15pf
crystal load capacitor. One pic pin was used to change the voltage seen
by the diode and it looked to me that the generated
change to the internal capacitance of the diode was enough to slightly
change the crystal oscillation rate. Just enough to get the PLL
action. I want to play with that idea myself !!! looked neat :-)

one of the pic pin used to

Michel Tremblay
Network specialist (CBS)
Sidus Systems Inc.
mtremblay@montreal.sidus.ca