> Van: Peter Schultz > Aan: PICLIST@MITVMA.MIT.EDU > Onderwerp: Re: Un-erasable memory in a 16C74A > Datum: donderdag 12 maart 1998 17:47 > > Hi, > > For me a similarly defective devices still a beliveble ESD. Yes, Two devices, twice a ESD discharge, two problems. But think of it: Two devices, programmed about 5 to 15 minutes after each other, developping the _same_ problem. ESD could zap one of them, but to zap _both_ of them at allmost (but not totally) the same time after 3 months of usage is to much for me. > Just think about lightning it will goes wherever the shortest and > easiest discharge path goes. My opinion is same with ESD. > If the devices has one pin which can damaged by 1000V (because > of the chip layout) and rest of them only will damaged by 5000V > my understanding is all the time the 1000V pin will destroyed. You could be right _IF_ the ESD was introduced at the same pin(s) every time. If the ESD is provided on random pins (and the thingy has 40 of them) the results should change dramatically. if they don't, we could have found a 'weak spot' ... > Altough I never did any tests in that matter, chips are to expensive > for that kind of game. Easier to follow some safety precaution. > Since I follow some basic rules I do not have any bad device. Auch! that's a slap on the wrist :-) But your'e right again. I could not hurt to try to stay ahead of problems. > Peter > Greetz, Rudy Wieser