Matt.. in the version of the 16c71 datasheet I have in front of me (from the
'97 Microchip Technology Library CD-ROM) there is a note right above example
13-1 to wit:

Note 4: After a conversion has completed, a
2.0 TAD delay must complete before
acquisition can begin again. During this
time the holding capacitor is not con-nected
to the selected A/D input channel.

What clock frequency are you running this device at? I see in your original
post that you are using Tosc32 as your divider so a 4 MHz clock would yield
(from table 13-1) a TAD of 8 us. giving you an additional 16 us of time
delay necessary between conversions. 1MHz clock gives 32 us TAD-- nasty.
-----Original Message-----
From: Matthew J. Bennett <mjb@HAZMAT.COM>
To: PICLIST@MITVMA.MIT.EDU <PICLIST@MITVMA.MIT.EDU>

<<snip>>
>According to the equations in the PIC17C7X data sheet, section 13.1
>(1995/1996 data book):
>
>Sampling time = Amp Settling time + Holding cap. charge time + temp coeff.
>              = 5us - 51.2pF( 1K + Rss + Rs) ln (1/511) + (Temp - 25) *
>.05us/ deg C
>
>Rs = 2K (at most)
>Rss = 7K (at 5V)
>Temp = 125 deg C(for automotive part)
>
>so plugging into this equation:
>sampling time = 5us + 3.2us + 5us = 13.2us
>
>I noticed the crosstalk when the sampling time was 22us, so I tried a bunch
>of parts to see where the crosstalk stopped.  I had delays of 22, 43, 65,
>105, 210, and 360 us, and the crosstalk was evident up to the 43 us
>sampling time, and not evident for the 65us and up sampling times.  I used
>a heat gun to warm up the 65us sampling PIC, and saw no degredation in the
>accuracy.  Thankfully I can afford to lose the extra clock cycles, but
>this is awfully frustrating.  Should I not trust the equations in the data
>sheet?  I have to resort to 4x the reccomended sampling time to make sure
>the conversion is correct.
>
<<snip>>