On Fri, 2 Jan 1998 13:59:12 +0000 Alan Hall <alanh@ANGLIANET.CO.UK>
writes:

>Did anyone have a view on my other question, regarding the need to
>check
>after disabling global interrupts?

This is necessary, because an interrupt could occur at the start of  the
instruction that clears GIE (while GIE is still set).  Since the
instruction has already started, the processor finishes it, clearing GIE.
 Then the hardware clears GIE again and goes to the ISR.  At the end of
the ISR, the RETFIE instruction sets GIE again.  The program continues at
the instruction following the one that was supposed to clear GIE, but GIE
is still set.  The official way is to check GIE and clear it again if it
ends up set.  Blindly clearing GIE twice could work too, as long as "back
to back" interrupts can't occur.

Rather than clear GIE to disable interrutps, the individual interrupt
enable bit(s) could be cleared instead.  Usually the ISR doesn't touch
them, so even if the clearing process were interrupted, they would stay
disabled afterward.  The interrupt flag bits would remember any pending
interrupt.