Thomas Magin wrote:
>
> Oh YES ...
>
> Really ?

That's exactly the tone of voice parents use when about to confronting a kid
 with
damning evidence of some misdemeanour. Sent shivers down my spine.

> Any comments ?

They say that too, just to make you squirm!

> What do you think of this piece of code (16C72):
>
> I2C     bcf     PIR1,SSPIF      ; Clear SSP Interrupt
>         bsf     STATUS,RP0      ; switch to Bank1
>
>         btfss   SSPSTAT,DA_     ; If Address were received last
>         goto    access          ;  decode next access
>         btfsc   SSPSTAT,RW_     ; Data were received
>         goto    rd_dat          ; master has read data
>         goto    wr_dat          ; master wrote data
>
> access  btfsc   SSPSTAT,RW_     ;
>         goto    rd_adr          ; master read access will follow
>         goto    wr_adr          ; master write access will follow
>
> rd_dat  bcf     STATUS,RP0      ; switch to Bank0
>         movf    TXCHECK,W       ; load Checksum
>         movwf   SSPBUF          ;  in I2C-Register
>         bsf     SSPCON,CKP      ; enable serial clock
>         goto    intout          ; data was read by master
>
> wr_dat  bcf     STATUS,RP0      ; switch to Bank0
>         movf    SSPBUF,W        ; Get I2C data
>         movwf   RXBUF           ;  store it in RXBUF
>         bsf     PS,I2CDATA      ; set I2CDATA Flag
>         goto    intout          ; data was written, result is stored in RXBUF
>
> rd_adr  bcf     STATUS,RP0      ; switch to Bank0
>         movf    TXDATA,W        ; load DATA
>         movwf   SSPBUF          ;  in I2C-Register
>         bsf     SSPCON,CKP      ; enable serial clock
>         goto    intout          ; data will be read by master
>
> wr_adr  bcf     STATUS,RP0      ; switch to Bank0
>         movf    SSPBUF,W        ; read SSPBUF in order to clear BF
>         goto    intout          ; data will be written by master
>
> intout  return
>
> It seems to be working fine. Without the copy of the RW-Bit.
>

Erm, I swear, me and my code is innocent!
I was only acting as per the information told me by the Microchip chap.
Ask him, he told me!
It fixed the problem, and I have no reason to complain.
Apart from the fact I enjoy it just a teeny bit.

Anyway, assuming your code to be working, you say it is for the (16C72).
Maybe the flags don't work in quite the same way as the 16C65.
Clutching straws I know.
Just a moment while I consult my 1996/1997 data book.

[sound effects of boots hobbling into the distance and back,
 a la Goon Show, followed by pages flipping]

Aha! The PIC16C7x data sheet on page 10-77 says of R/W

        "This bit is only valid during the transmission"

does this mean it is NOT valid during reception?
And transmission from the master or slave's point of view?

The PIC16C6x data sheet on page 9-79 says of R/W

        "This bit is only valid from the address match to the next
        start bit, stop bit, or /ACK bit"

does this mean it is NOT valid almost immediately when the slave
acknowledges reception of the address byte?
/ACK bit high, low, or either?

In my best Inspector Clouseau voice, I can say that I deduce the
technical author had some reason for altering the text.
Normally a similar document is copied and the differences incorporated.
I should know. I was one once.
Do these two sentences mean exactly the same thing?
If so, why not use the same sentence?
Either way, I smell a rat.

Given the fact your code works on a '72, and my code needs the fix on a '65,
I suspect the two chips behave differently.

Just to confuse things even further, I've had the problems on my ICEPIC
emulator. This uses a 16C62 (running the code) in parallel with a 16C74
(running peripherals). So which is carrying the SSP I'm not sure.

So I put my hands on my hips, and say "What do you make of that then?"

Yours pedantically, Keith.

PS. I don't think this is going to lie down just yet!