At 09:25 PM 12/6/97 -0500, you wrote:
>    For my microcontroller class at school, I have to interface an
>Intel 8085 chip with a 32K combination of RAM and ROM.
>Unfortunately, most of the data books that I've seen don't list RAMs
>that small.  This would have to be a parrallel interface with an
>address bus.  Does anyone know where on the web I can find files
>(.pdf or other) for parts like these?
>    Also, how many address pins would I need to address 32K of memory?
>
>Thanks for any guidance,
>Shawn Call
>

Hi Shawn,

        Try looking for static ram (SRAM) rather than DRAM (unless you need DRAM
).
Not only is static ram available in small sizes, but it does not require
refresh like DRAM does, and it also has a simpler address system (similar
to ROM, instead of the RAS/CAS business). Many companies make static ram,
although Motorola is the only one that comes to mind right now. Try
www.mot.com (Motorola) or a search on a search engine for static ram or SRAM.
        For 32K, you would need 15 address lines (2**15 = 32768). ROM works like
this: there are usually 8 data lines and a certain number of address lines.
To read a location, you simply apply the correct address to the address
lines and then lower the OE (output enable) pin. After a specified amount
of time (called access time), the data from that location is placed on the
8 data lines by the ROM chip. When you have read the data into your
processor, you simply raise the OE line again and the ROM chip will
Tri-state its outputs. Static ram works the same way. To write static ram,
you just place appropriate address on the address lines and appropriate
data on data lines and then lower the WE (write enable) pin for a minimum
of a certain length of time.
        Both static ram and rom also have a CE (chip enable) pin. The chip will
ignore all its other pins as well as tristate all its outputs if CE is
high. So, to activate a chip, you lower its CE. This would be done before
lowering OE or WE. OE on a static ram might also be called something else,
like RE (read enable). One final note: when you are putting several chips
on one bus, you usually use their CE pins to select one of the chips. So in
your case, the CE would differentiate between RAM and ROM accesses.

Good luck,

Sean

+--------------------------------+
| Sean Breheny                   |
| Amateur Radio Callsign: KA3YXM |
| Electrical Engineering Student |
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