David Duffy <AVD@MAILBOX.UQ.EDU.AU> wrote:
> A slightly off-topic question here but does anyone know of a 4Mbit
> DRAM that has a single column strobe instead of the usual two ?

and later:
> No.No. What I mean is only one CAS pin. (COLUMN address strobe)
> That is; RAS + CAS (2 pins) not RAS + UCAS + LCAS (3 pins)

Sounds to me like you're talking about a 256K*16 part with separate CAS
strobes for two eight-bit sections.  If that is the case, why not just tie
UCAS and LCAS together?

AFAIK, all the 16-bit-wide parts have either two CAS strobes, or two Write
Enable lines, in order to allow single-byte writes.

DRAM typically offers two variants of the write cycle, early write and late
write.  These are distinguished by whether the write enable is asserted early
or late in the cycle.  Some microprocessors do not give a write indication
or byte selects until late in the memory cycle, in which case it is easiest
to use the dual-write-enable DRAMs.  Otherwise, the dual-CAS DRAMs are
typically used.

With either style of DRAM, if you don't need independent byte control, you
can simply tie the paired signals together.

Cheers,
Eric