On Sun, 28 Sep 1997 09:43:11 -0700 "Michael S. Hagberg" writes: >to complement any bit you can do the following. note: the carry bit >(bit 0) >is in the status register (ram location 3). > > btfsc 3,0 ; status,c > bcf 3,0 > btfss 3,0 > bsf 3,0 This code will not work. The bit will always be set at the end regardless of its value at the start. In order to make something like this work, the "set if clear" part (the last 2 instructions) needs to be bypassed if the bit was cleared because it was set by the first 2 instructions. Complementing a bit without affecting W requires lengthy goto instructions. Others have already posted these 2 good solutions: movlw 1 ;xor mask rlf file,f ;Carry bit into file.0 xorwf file,f ;Complement copy of carry bit rrf file,f ;Put data back, complemented carry. John Payson suggested using FSR, actually any file register can be used as long as its intermediate value won't be examined by an interrupt routine. After this routine, the data in the file register will be the same as it was at the start. And the most direct solution of all (I beleive due to Andrew Warren): movfw STATUS ;Get status bits into W xorlw 1 ;Carry bit is bit 0 - complement it. movwf STATUS ;Put complemented bits back This one has the possible advantage of not affecting the Z bit. Now to contribute something which I hope is useful and original. I hvaen't seen any posts about using add or subtract to complement carry. Subtracting 1 from 0 will clear carry, but subtracting 0 from 0 will set it. So use something like this: movlw 0 skpnc movlw 1 ;Now W=0 if C =0, W=1 if C=1 sublw 0 ;0-W, sets C if W=0 By using a known-zero location, could be simplified to rlf always0,w ;C into LSB of W subwf always0,w ;Same as sublw 0, since f always 0. Using subwf rather than sublw makes the code compatible with 12-bit PICs. But it's hard to make this one conditional, since both instructions affect carry, skipping only one of them will not leave C unchanged. Using 2 conditional skips, the routine would only be 4 words, the same length as the shortest other conditional ones proposed.