In message  <19970922.144517.6878.3.mkeitz@juno.com> PICLIST@MITVMA.MIT.EDU
 writes:
> On Mon, 22 Sep 1997 13:24:04 GMT Mike Watson <mike@D-M-G.DEMON.CO.UK>
> writes:
>
> >Is there not a danger with this method that the pointer location
> >could get corrupted if it is being written at the same time that
> >the power is being removed?
> >
> >Have you a mechanism to deal with that?
>
> It is important that the new pointer is written *after* the data.  If
> power fails while writing to the new data block, the pointer will still
> point to the old one, so the incompletely written data will not be used.
> If the new data block is written but the power fails while writing the
> pointer, both blocks of data will be valid (one old, one new).  The read
> routine must mask the pointer so it always reads one or the other data
> block.  If the pointer is bad the worst that could happen is the older
> data will be retreived, the same result as if the new data were not
> completely written.
>
> All this is based on the assumption that cutting the power off in the
> middle of an EEPROM write will only affect the byte being written.
>

Is this a good assumption to make? Does it hold good with the
on board C84 EEProm as well as external IIC EEProm and FRAM?

This has more than academic interest for me as I am inheriting a
project which exhibits ee-memory loss.


Cheers,

Mike Watson



--
Mayes uk