> On Thu, Sep 18, 1997 at 07:50:09PM -0500, John Payson wrote:
>
> > It's true that not all PICs have a hardware known-zero.  Nonetheless, you
> > might want to consider having the compiler allocate one.  You could use
>
> The trouble with allocating a RAM location as a zero is that you have
> to ensure it is in fact always zero (some of your suggestions make it
> non zero temporarily) or be prepared to save and restore it on interrupts.

Well, there are three approaches:

[1] "CLRF" a certain address at startup and never write to it during
    program execution; use that address for nothing else.  This may not
    pose a problem, since the parts that lack a convenient hardware KZ
    generally have a fair bit of RAM.  On something like the '622, you
    could use $7F; it's hardware-KZ in one page and you could CLRF it
    in the other.

[2] Save/restore it during the interrupt routine (kinda a bummer of an
    idea, really, but it would be possible)

[3] For that and all other non-hardware compiler temps, allocate a sep-
    erate copy for use during ISR's.  This would make it necessary to
    link in twice any routine that's needed by both an ISR and the main
    program, but I wouldn't think that should be a problem.  Far better
    than saving/restoring a lot of compiler-temp variables.

If you're not well-equipped for [3], I think [1] may be the best way to
go.

> An easier approach is to use a known-zero location on chips that have it,
> and do things other ways on other chips. This is already on our to-do list
> (thanks to your earlier suggestions!)

While I can imagine that a few applications on the 16C74 could have a fit
if you stole a register for use as KZ (to which you never wrote other than
a CLRF on startup) I'd certainly want the ability to have the compiler
generate code using that if I had any RAM at all to spare (after all, any
RAM the compiler doesn't do something with will never be used--EVER).
Perhaps a compiler option?