Hi John (John Payson), in <199709081558.KAA10568@Mercury.mcs.net> on Sep 8 you
 wrote:

> [2] Most I2C memory devices never drive the clock wire themselves; if you
>     will be using such devices in a single-master environment, it may be
>     easier and faster to just set and clear the clock wire directly.

BTW, you can load TRISB into FSR, load 0 into SCL/SDA PORTB bits, and then
toggle the SCL/SDA lines from 0 to pullup via INDF.  You don't need to
switch register banks every time you want to apply a clock and then read
the bit.  This is as fast as your proposal (push-pull SCL) but compatible
to systems where SCL must stay open-collector.  It asserts FSR, obviously.