In message  <616355217A07D011828D00805FCCB1C0A46218@torino.corp.es.com>
 PICLIST@MITVMA.MIT.EDU writes:
> I just met with an FAE from microchip, who said this was basically a
> masked FPGA.....
>

Which I guess means that:

  - the die size will be bigger (?)
  - Scenix will be fab-less (?)

Both of which lead to higher production costs - right?
Are there any other issues, good or bad with it being a masked FPGA?


Incidently, I have mentioned it before, but I know someone who uses
a 16C57 (IIRC) with an external oscillator at 50 MHz in production. He
was happy to select on test each PIC, but has found that every PIC he
has bought has worked. He doesn't cover the full temp range though
which might make a difference, but I suspect that most projects don't
need to cover the range anyway.

Regards,

Mike Watson