Bob Lunn 08/11/97 02:49 PM I thought the list might be interested in a brief summary of the microcontroller section of the Microchip 'Future Products' document. 8-pin/12-bit 16 bytes of data eeprom 8-pin/14-bit 16 bytes of data eeprom eprom 4 ch x 8-bit A/D 8-pin/14-bit 16 bytes of data eeprom flash 4 ch x 10-bit A/D serial I/O (uart?) 14-pin/14-bit note the new package option eprom internal 4MHz oscillator 4 ch x 10-bit A/D 16-bit timer (runs during sleep) capture/compare/pwm module 18-pin/14-bit 128 bytes of data eeprom eprom analog comparators 18-pin/14-bit 2k bytes of program eeprom flash 128 bytes of data eeprom internal oscillator (4MHz?) analog comparators 4 ch x 10-bit A/D 16-bit timer (runs during sleep) capture/compare/pwm module usart 20-pin/14-bit note the new package option flash 4k bytes of program eeprom 128 bytes of data eeprom internal oscillator (4MHz?) 4x PLL (for oscillator?) programmable gain amp (for oscillator?) 4 ch (2 ch diff) x 10-bit A/D 16-bit timer (runs during sleep) capture/compare/pwm module usart 28 & 40-pin internal oscillator (4MHz?) eprom 5 ch, 8 ch, 11 ch x 10-bit A/D 16-bit timer (runs during sleep) 8-bit timer (in addition) capture/compare/pwm module usart 28 & 40-pin 8k bytes of program eeprom flash 256 bytes of data eeprom processor read/write to program eeprom internal oscillator (4MHz?) 10-bit A/D (runs during sleep) analog comparator 16-bit timer (runs during sleep) 8-bit timer (in addition) capture/compare/pwm module usart parallel slave port Notes: There seems to be a distinction between the 4MHz RC oscillator used on the 8-pin/12-bit cores, and the "precision" R/C oscillator used on the 8-pin/14-bit cores. There are some curious references to 'multi-speed clocking' (eg: 16F825). Some of the new flash parts (though only in the 28- and 40-pin packages?) support 5V only writes to program eeprom. This would appear to allow remote in-circuit programming, and self-modifying code. Note the new 14-pin package 16C471/472. Note the new 20-pin package 16F787 (this is the one with the PLL to give one instruction cycle per clock cycle?). This is a _powerful_ looking chip. The operating speed of most 'flash' based devices is increased to 20MHz. A new family of devices designated 16C1xx is announced. This has a 16-bit core like the 17Cxxx family, though any actual similarity between the two is impossible to determine. This new family is distinguished by a 'C-compiler optimized instruction set', a 'software stack capability', and an 'independant 32 kHz timer oscillator'. These devices all feature large memory sizes: 8k to 16k program memory; and 512 to 1536 bytes data memory. The stand-out member of the family is the 16C185 which 'implements FULL CAN model'. Two new members of the 17Cxxx family are announced that support IIC master mode (17C762/766). However, these are only available in surface mount packages. ___Bob