Mike Keitz (mkeitz@JUNO.COM) writes:
> Except for the poorly designed portB interrupt on change, these
> spurious reads would have no effect.

Wouldn't this also cause a problem if FSR points at RCREG on
SCI-equipped PICs?  Reading RCREG clears the RCIF bit.

John Payson (supercat@MCS.NET) also wrote:
> Supposedly, these "problems" have been fixed in newer silicon (the
> decode logic disables the operand fetch if the opcode is 00 000x
> 0000 0000 [and maybe for 00 000x 1000 0000 (i.e. movwf) as well]).

John, do you happen to know the cutoff between "new" and "old" silicon?

Brian