On Mon, 14 Jul 1997 10:32:05 -0500 John Payson <supercat@MCS.NET> writes:
[...]
>Too bad there isn't a version of "MOVF" that doesn't set flags.  The
>opcode
>space of the 16Cxx parts would even have room for it.  Oh well...
>
That wouldn't be my first choice for expanding the instruction set.  For
that I'd like to have two instructions to move any bit directly in and
out of the Carry bit.  This would speed up serial I/O and general
bit-shuffling.  Also nice would be a way to complement a bit, which the
17CXX has.

For going in and out of ISRs it would be better to expand RETFIE to take
a parameter which is a RAM adress to recall to STATUS (without affecting
flags of course).  Then the ISR would be:

int
        movwf   savedw
        movfw   STATUS
        movwf   saveds
[interrupt service code]
        movfw   savedw
        retfie  saveds
This takes 3 cycles off of the old method, or two off of the method that
could be used if a no-status MOVFW were available.  It is also compatible
with old code by assembling RETFIE STATUS which would merely copy STATUS
onto itself during the return, doing nothing.  Since the RETLW
instruction has 2 don't care bits in it, several new specialized returns
could be defined.

There is still the need to trash W in order to save STATUS at the start
of the ISR.  If the hardware copied STATUS into a dedicated shadow
location during the interrupt, then 2 cycles could be saved there.  Since
nearly all interupt-driven PIC code is not nested (facilitated by the
automatic disable), having only a single dedicated shadow location
wouldn't be much of a problem.  If the ISR could be written to not change
W (but still damage STATUS), then this feature and the new return and
load instruction would cut interrupt overhead to none, or 2 cycles and
one RAM location if W needs to be saved.