While reading the programming specs (S30557B-page 5) for 12C5XX, I
discovered the following note:

  The /MCLR pin should be raised from VIL to VIHH within 9 ms
  of VDD rise. This is to ensure that the device does not have the
  PC incremented while in valid operation range.

This makes ISP a bit more difficult than for a 16C84, for instance.
Anybody reflected over it?

Martin Nilsson                           http://www.sics.se/~mn/
Swedish Institute of Computer Science    E-mail: mn@sics.se
Box 1263, S-164 28 Kista                 Fax: +46-8-751-7230
Sweden                                   Tel: +46-8-752-1574