>Does this code allow for 2 stop bits? I would be interested if yes.
>
>Regards,
>
>Ross McKenzie
>Melbourne Australia
>

Hi Ross,

The code does not check the start and stop bits, so you can have any number
of them, 1, 1.5 or 2. The asynchronous protocol specifies the stop bits as a
minimum time, so you can always have more.

Before enabling interrupts, load the RCCNT variable with 8 and clear RCBF
flag. Select appropriate edge for the external interrupt - if using MAX232
or similar, then high to low transition. It is also possible to use only
current limiting resistor and two diodes to ground and +5V (or no diodes at
all since there are protection ones in the PIC), then the signal polarity is
inverted and you need to select rising edge.
At least litle comments of the code: At 32 kHz and 1200 Bd you have 7 clocks
to process a bit. After receiving interrupt, there is 3 to 4 cycles latency
and another 6 instructions you spend saving W and STATUS registers. Other
words you do not have time to check the start bit. If there is only external
interrupt enabled, you could skip testing the INTF bit and test RB0 instead
for valid start bit. Having one interrupt only would be anyway necessary,
since you could miss a character while servising the other interrupt, the
response has to be immediate.You could also add a stop bit test at the end
of the interrupt routine, but here the time is spared to process the
received character in the main loop.

Original code, tested and working (better say copied from working program
and made look prettier):

        CBLOCK xxx
        TEMPW, TEMPS, RCCNT, RCDATA, FLAGS
        ENDC

        ORG     4
INTER:  MOVWF   TEMPW           ;SAVE REGISTERS
        SWAPF   STATUS,W
        MOVWF   TEMPS
        BTFSS   INTCON,INTF
        GOTO    ...ANOTHER INTERRUPT SERVICE
        BCF     STATUS,C

I0:     BTFSC   PORTB,RB0       ;8 BIT LOOP  (OR BTFSS FOR INVERTED POLARITY)
        BSF     STATUS,C
        RRF     RCDATA,F
        BCF     STATUS,C
        DECFSZ  RCCNT,F
        GOTO    I0

        BSF     FLAGS,RCBF      ;SET CHARACTER RECEIVED FLAG (RECEIVE BUFFER
FULL)
        MOVLW   8               ;RESTORE RCCNT
        MOVWF   RCCNT

        BCF     INTCON,INTF     ;CLEAN UP AFTER INTERRUPT AND RESTORE REGISTERS
        SWAPF   TEMPS,W
        MOVWF   STATUS
        SWAPF   TEMPW,F
        SWAPF   TEMPW,W
        RETFIE

In the main loop you work about this way:

MAIN:   BTFSS   FLAGS,RCBF
        GOTO    MAIN
        BCF     FLAGS,RCBF
        MOVF    RCDATA,W
        ....PROCESS THE CHARACTER
        GOTO    MAIN

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++++++
Possible enhancements, not tested:

        ORG     4
INTER:  BTFSC   PORTB,RB0       ;TEST START BIT (OR BTFSS FOR INVERTED POLARITY)
        RETFIE
        MOVWF   TEMPW           ;SAVE REGISTERS
        SWAPF   STATUS,W
        MOVWF   TEMPS,F
        BCF     STATUS,C

I0:     BTFSS   PORTB,RB0       ;8 BIT LOOP
        BSF     STATUS,C
        RRF     RCDATA,F
        BCF     STATUS,C
        DECFSZ  RCCNT,F
        GOTO    I0

        NOP
        BTFSS   PORTB,RB0       ;TEST FIRST STOP BIT
        BSF     FLAGS,RCFE      ;SET FRAMING ERROR FLAG

        BSF     FLAGS,RCBF      ;SET CHARACTER RECEIVED FLAG (RECEIVE BUFFER
FULL)
        MOVLW   8               ;RESTORE RCCNT
        MOVWF   RCCNT

        BCF     INTCON,INTF     ;CLEAN UP AFTER INTERRUPT AND RESTORE REGISTERS
        GOTO    $+1             ;TWO CYCLES NOP
        BTFSS   PORTB,RB0       ;TEST SECOND STOP BIT
        BSF     FLAGS,RCFE      ;SET FRAMING ERROR FLAG

        SWAPF   TEMPS,W
        MOVWF   STATUS
        SWAPF   TEMPW,F
        SWAPF   TEMPW,W
        RETFIE

Testing start bit would be certainly helpful to avoid false reception
initiated by spikes on the RB0 pin, but testing stop bits seems less useful
to me. Even if you discover framing error what would you do ? Trash the byte
? Ask for resend ?

Regards

Josef Hanzal
Czech Republic
euroclass@pha.pvtnet.cz