Gerhard Fiedler wrote:
>
> At 07:38 19/05/97 -0400, Tony Matthews wrote:
> > >I thought of writing some sample code here, but it's really all there --
> > >provided it works as written. For the first location you put 0 in EEADR and
> > >your data in EEDATA, and then do as they say.
> > >
> >one of the gotcha's that I see on the list often is trying to write
> >consecutive bytes to eeprom without allowing for the required delay
> >between writes. Tony M.
>
> Which (the required delay) is given by either the WR bit being cleared or
> the EEIF bit being set (with possibly an interrupt associated). Is there
> any difference between the two when polling for the end of the write cycle?
I generally have little or no programming words left over on a 16c84 so
prefer to do other work during the 10 ms delay so I cannot advise you as
to polling have'nt done it. luck Tony M.