|Tjaart seems to agree with me, I just read in another message. I think it
|could be really helpful to be able to deliver completely erasable (and
|therefore reprogrammable) chips _with_ (erasable) memory protection.

The approach I would favor would be to have two protection bits--one erasable
and one not; if either is set for protection the device is protected, other-
wise is isn't.  In addition, I'd like to see a word of factory-programmed
metalized OTP added to the "configuration area" [e.g. maybe at address XX04,
just after the ID fuses] which would identify the procesor, revision, and
window-status.  This would allow programmers to operate more intelligently
and shouldn't cost anything significant (since I understand that most PICs
have some OTP there which was used for factory testing anyhow).

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