> From: Andrew Warren > [cut] > > Or is TMR0 possibly advanced while you are in the process of > > adding to it? > > TMR0 (and/or its prescaler) is DEFINITELY advanced while you're > writing to it, so you need to make allowances for that. The > easiest way, in general, is to just make a rough guess as to the > reload value, then fine-tune that value by observing the > program's behavior on a scope. This harks back to one of my first PICLIST postings. One can be entirely scientific about setting TMR0 to be a period counter other than 256. This is one way to do it, but assumes the prescaler is not being used. If the prescaler is being used, this technique is still useful if one ensures that there is a constant number of cycles of execution between the start of the interrupt handler and the clock advance. Read that as 'put clock advance at start of interrupt routine', folks. If this is done, then the interrupt gets fired off at exact intervals (no jitter). If the prescaler is used, the '259' constant should be reduced to 257 for a prescale of 2, and 256 for all other prescales. Also, and this gets really tricky, the actual period obtained will depend on the number of instructions executed since the start of interrupt, since the prescaler 'remainder' (which gets truncated when the clock is advanced) will depend on this. CYCLES equ 50 ; Desired TMR0 period org 4 ; interrupt routine ... ; save status and anything else ; Advance clock so we get back here in exactly CYCLES instructions ; Subtract desired interval from 259 (not 256) to compensate for clock ; restart delay. Since this is the nth cycle since the clock ticked over, ; CYCLES must not be greater than 259+n to avoid interrupt race condition. ; CYCLES must not be less than the maximum required for interrupt service ; plus a little extra for useful (non-interrupt) work, for the same reason. ; Note diff between simulator and real device! movlw 259-CYCLES ; 259 for real device, 258 for mpsim. addwf tmr0,f ; Wind clock forward (daylight saving?) ... retfi Regards, SJH Canberra, Australia