How to do it in code:

If using hardware flow control, check RTS, if raised, raise CTS and start a
timer for 1-3 msecs.

Look for start bit edge.
- if using flow control, check continuously until timer expires
- otherwise, check once every 1/4 bit width, a 'reasonable' sample rate

If edge found:
- if polling continuously in previous step, wait 1/2 bit width
- otherwise wait 1/4 bit width

You are now 1/2 way through start bit (1/4 to 1/2 if sampling rather than
continuous test).  This is a good sample point.

Wait for 9 bit periods to go by, sampling at end of bit period and rolling
inverted line state (0 on line = 1 bit) right through an 8 bit register.

Wait for 1 bit period to go by.  Reject the byte if line high, invalid stop
bit.

When all bytes received, drop CTS if using h/w flow control.

Beware of buffer overrun.  Just because you drop CTS does not mean COMs
stop.  Some cached UARTs empty their buffer before stopping even if flow
control used.