In college, they taught us that the difference between EPROM and
     EEPROM was that, for the former, you erased it by placing it into a UV
     eraser, clearing the entire device before any one location could be
     programmed to an arbitrary value (not just changing existing 1's to
     0's); whereas with a EEPROM, any location could be erased and
     reprogrammed without affedcting the entire array.

     This is essentially the same as between EEPROM and Flash, with the
     latter requiring erasure of a BLOCK of memory, rather than the entire
     array. This is where the cost savings comes in: since erasure requires
     a different set of address lines than r/w, removing them creates a
     tighter array with more gates per square mil than EE.

     Program memory is USUALLY treated in a Flash-like manner anyway, where
     you erase the entire array before entering a new program, verdad? So,
     no matter what the underlying technology or block size is, you still
     erase the entire block anyway. This, incidentally, is how Atmel's and
     Microchip's Flash parts work.

     Flash (NV memory w/fewer erase lines) doesn't really become
     economically feasibly until array sizes above 512kb.

     Norm LeMieux
     MCHIP FAE/NW